Dharmendra S. Modha

My Work and Thoughts.

Supercomputing 2014

By

This week, IBM and Cornell team presented a ACM Gordon Bell Prize Finalist paper at Supercomputing 2014:

Title: “Real-time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with 100× Speedup in Time-to-Solution and 100,000× Reduction in Energy-to-Solution”.

Authors: Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul A. Merolla, Pallab Datta, Marc Gonzalez Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steve Millman, Nabil Imam, Emmett McQuinn, Yutaka T. Nakamura, Ivan Vo, Chen Guo, Don Nguyen, Scott Lekuch, Sameh Assad, Daniel Friedman, Bryan L. Jackson, Myron D. Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha

Abstract:
Drawing on neuroscience, we have developed a parallel, event-driven kernel for neurosynaptic computation, that is efficient with respect to computation, memory, and communication. Building on the previously demonstrated highly-optimized software expression of the kernel, here, we demonstrate TrueNorth, a co-designed silicon expression of the kernel. TrueNorth achieves five orders of magnitude reduction in energy-to-solution and two orders of magnitude speedup in time-to-solution, when running computer vision applications and complex recurrent neural network simulations. Breaking path with the von Neumann architecture, TrueNorth is a 4,096 core, 1 million neuron, and 256 million synapse brain-inspired neurosynaptic processor, that consumes 65mW of power running at real-time and delivers performance of 46 Giga-Synaptic OPS/Watt. We demonstrate seamless tiling of TrueNorth chips into arrays, forming a foundation for cortex-like scalability. Unprecedented time-to-solution, energy-to-solution, scale, and performance of TrueNorth, combined with underlying flexibility of the kernel enables a broad range of cognitive applications.

The long-term aspiration is to build a “1%-human-scale” system with 4,096 processors one trillion synapses and that consumes merely 4kW.

4096 Processor System
Illustration Credit: William Risk

Cognitive Systems Colloquium

By

On May 10-11, 2006, I chaired IBM’s Almaden Institute on Cognitive Computing. The Institute brought together over 165 attendees from over 57 different institutions and featured prominent speakers and panelists: Nobelist Gerald Edelman, The Neurosciences Institute, Henry Markram, EPFL/BlueBrain, Robert Hecht-Nielsen, UCSD, Jeff Hawkins, Palm/Numenta, James Albus, NIST, Theodore Berger, USC, Kwabena Boahen, Stanford, Ralph Linsker, IBM, Jerry Swartz, The Swartz Foundation, V. S. Ramachandran, UCSD, John Searle, UC Berkeley, Joaquin Fuster, UCLA, Leslie Valiant, Harvard University, Toby Berger, University of Virginia, and Christof Koch, Caltech.

Today, 8.5 years later, I chaired IBM’s Cognitive Systems Colloquium with the goal of Taking Brain-Inspired Computing to Market. The Colloquium gathered over 200 eminent, innovative thinkers from academia, government, industry, research and the media.

Here are speakers and panelists:

  • Andreas Andreou, Johns Hopkins
  • Dharmendra S Modha, IBM Fellow, IBM Chief Scientist, Brain-Inspired Computing
  • Fei-Fei Li, Director, AI Lab, Stanford University
  • Gary Marcus, NYU
  • Gill Pratt, DARPA SyNAPSE Program Manager
  • Horst Simon, Deputy Director, Lawrence Berkeley National Lab
  • Karlheinz Meier, Co-Director, Human Brain Project, U. Heidelberg
  • Mark Anderson, Future in Review and Strategic News Service
  • Michael Hawrylycz, Allen Institute for Brain Science
  • Miyoung Chun, Executive VP of Science Programs, Kavli Foundation
  • Rajit Manohar, Cornell University, Associate Dean
  • Richard Cytowic, Author of Synesthesia: A Union of the Senses
  • Jayashree Subrahmonia, Vice President, Products, IBM Watson Group
  • Tobi Delbruck, Co-Founder, iniLabs & Professor, ETH
  • Vijaykrishnan Narayanan, PI, NSF Expeditions in Computing, Professor, Penn State

The Colloquium also included a SyNAPSE Deep Dive that covered: TrueNorth Architecture, TrueNorth Neuron Model, TrueNorth Chip with 1 million neurons and 256 million synapses, Single Chip Board, 16 chip Board, Future Scaling Path, TrueNorth “program”, Compass Simulator, Corelet Programming Language, SyNAPSE University, and Demos.

Videos from the event will be available in the near future. Here is a summary.

Breaking News: Science

By

Today, Science published our article (free from this web site) entitled “A Million Spiking-Neuron Integrated Circuit with a Scalable Communication Network and Interface”. Here are links to reprint (free from this web site) and abstract (free from this web site). Article was published along with a news feature (behind paywall) and cover (behind paywall) profile.

Cover